1. Field of the Invention
The present disclosure generally relates to semiconductor devices. More specifically, the present disclosure relates to tunneling field-effect transistors.
2. Description of Related Art
Advances in the semiconductor industry have reduced the size of transistors in integrated circuits (ICs) to 45 nm. Continuing pressure to create smaller and more power efficient products will continue to reduce the transistor size to 32 nm and smaller. Decreasing in transistor sizes leads to decreases in power supply voltage to the transistors and capacitance of the transistors. For example, power supply voltages have decreased from 5 Volts to nearly 1 Volt in the last fifteen years. As the power supply voltage has decreased, the threshold voltage of the transistors in the ICs has also decreased.
Lower threshold voltages are difficult to obtain in conventional metal-oxide-semiconductor field-effect transistors (MOSFETs) because as the threshold voltage is reduced the ratio of on current to off current (Ion/Ioff) also decreases. The on current refers to the current through a MOSFET when a gate voltage applied is above the threshold voltage, and the off current refers to current through a MOSFET when a gate voltage applied is below the threshold voltage.
Tunneling field-effect transistors (TFETs) as shown in FIG. 1A have improved on current to off current (Ion/Ioff) ratios. Band-to-band tunneling in TFETs increases the achievable on current (Ion) allowing further reductions in threshold voltage, power supply voltage, and transistor size. A conventional TFET 100 includes a drain region 120 and a source region 140 in a substrate layer 110. The drain region 120 and the source region 140 are doped with opposite carriers. For example, the drain region 120 may be an n-doped region and the source region 140 may be a p-doped region. A gate oxide 130 is deposited on the substrate layer 110, and a gate electrode 132 is deposited on the gate oxide 130. A gate voltage above the threshold voltage applied to the gate electrode 132 switches the TFET 100 from an off state to an on state. During the on state current conducts substantially along a path illustrated by a line 146 from the source region 140 through the substrate layer 110 to the drain region 120.
A band diagram 150 for the TFET 100 is shown in FIG. 1B. A line 152 represents energy levels of the conduction band, and a line 154 represents energy levels of the valence band. A shift in the lines 152, 154 occurs due to different carrier dopings in the regions 120, 140. A line 164 represents the doping concentration profile for carriers implanted in the source region 140, and a line 162 represents the doping concentration profile for carriers implanted in the drain region 120. Overlap of the doping concentration profile is indicated by the lines 162, 164 between the regions 120, 140. In an on state of the TFET 100, a carrier 156 (e.g., electron or hole) traverses from the source region 140 to the drain region 120.
However, on current (Ion) in conventional TFETs, such as TFET 100 in FIG. 1A, is limited by band-to-band tunneling (BT-BT). The solid solubility and large bandgap of, for example, silicon limits BT-BT. The tunneling probability is also adversely affected by the concentration profile of region 140 under gate bias. Depletion of carrier in region 140 during ON gate bias will lead to a less abrupt concentration profile thus reducing the tunneling current.